Um controlador microprogramável para comutadores ATM.

Abstract

Most of works that propose architectures to perform the ATM layer functions obtain an ASIC or ASICs implementation based in their own specifications. These architectures are not flexible to allow adjusts due to changes in standards, optimization needs or new services requirements, that improve changes in original set of specifications like: a new parameter header; changes in current input rate policing algorithm; a new routing table structural definition; changes in switching element control, etc. A new development and fabrication cycles is need to incorporate these news specifications. This work proposes a microprogrammable controller designed to perform the ATM layer functions of an ATM switch based in a microprogrammable control unit. This unit gives flexibility to change the initial specifications by microinstructions programming, with the same hardware. The controller logic validation and viability was made using CADENCE and ALTERA frameworks, resulting in a standard-cells and FPGA implementations.