Conversor analógico-digital de dobramento utilizando circuitos a capacitor chaveado.

Abstract

This wor aims to contribute for the development of an 8 bits Folding Analog to Digital Converter using Switched Capacitor (SC) circuits. The converter uses a sampling irregular type "sampling crossing levels", which is a non-uniform sampling in time to perform the conversion, which causes the internal circuity of the converter are driven only when necessary. Simulations were conducted with the converter using switched capacitor circuits and the converter using resistors to compare the performance the folding SC converter with an existing one. By simulation, using manufacturing standard technology 0,35 um (TSMC035), we obtained the 8 bits folding SC converter, a signal-to-noise plus distortion (SNDR) of 45,8 dB, with a consumption of 4,9 mW, while the 8 bits folding converter using resistors obtained a signal-to-noise plus distortion (SNDR) of 41,0 dB, with a comsumption of 11,9 mW. Was conducted the design of the SC folding ADC chip layout, using for this computacional tools from Cadence with standard manufacturing technology 0,18 um (CMRF7SF). By simulation, converter was obtained A/D Folding 8-bit SC signal to noise ratio more distortion (SNDR) of 7,23 mW. To conclude this research was mounted in the laboratory the SC folding ADC circuikt with três bits using discrete components, which obtained an SNDR of 18,06 dB and a 2.71-bits ENOB, while in simulation was reached SNDR of 19.05 dB and an ENOB 2.87 bits.