Análise de mutação aplicada à verificação funcional de IP core.

Abstract

There is a growing need to make IP cores more reliable. Hence, it is necessary to use a rigorous functional verification methodology to this kind of product. This process is responsible for 70% of a project’s resources, so it becomes important to enhance the functional verification techniques in order to reduce the cost of a project. A functional verification methodology, named VeriSC, is targeted at eliminating some flaws in other methodologies. Though there is an aspect in this methodology that needs refinement. One of them consists in determining the quality of the coverage achieved. There are some software techniques that try to extract quality parameters from test case sets of a given system. Among them, there is the mutation analysis technique, which proposes the generation of a quality metric by the analysis of mutants generated from the original program. These mutants are automatically created by applying carefully chosen mutation operators to the source code. Therefore, these operators must be chosen very carefully. The objective of this work is the application of mutation analysis within a digital system functional verification methodology, to check the contribution of this tecnique in evaluating the quality of the functional verification coverage. Various contributions could be made while apllying mutation analysis over a functional verification methodology, among them were the possibility to find defects on the reference model. It was possible to find out that a IDCT module, that was submitted to a high quality verification process, this process can still be enhanced another 11% according to the test quality parameter called mutation score.