Projeto de leiaute de um amplificador operacional de dois estágios.

Abstract

The fabrication of integrated circuits is a complex process developed in some steps, since the description of the function to be realized by the circuit, passing through its casting with electrical components, simulations to verify the results, implementation of the circuit layout (which is the process that defines the physical positions of each component in the wafer), ending with the packaging and the tests. The main purpose of this work was the implementation of a layout of a Two Stage CMOS Operational Amplifier from a project [2], using the Cadence® tool to simulate the schematic, to implement the layout and to extract the parasites from the system.