Modelagem de um PUF em HDL para implementação em FPGA.

Abstract

Investments in device security are increasing steadily. The major concern is cyber attacks that cause financial losses and often aggravated by IP piracy. One way to secure devices is through authentication. In this work we present the design and development of a Physical Unclonable Function in HDL, based on the design of a Ring Oscillator, with the purpose of being implemented in a FPGA to demonstrate the safety related gains of the device.