Implementação de um gerador de números aleatórios gaussianos em hardware.

Abstract

Random distributions have become fundamental elements to the science development in many areas. However, the random number generation in digital systems was and will continue to be big challenge considering that it’s not possible to convert a deterministic system into a machine capable of generating stochastic events. To overcome these limitations, many methods were developed to implement pseudo-random number generators. This project aims to implement, in hardware, a Gaussian random number generator based in the inversion’s method and adopting two main architectures: LUT and MCM. To accomplish that, mathematical models were developed in Python to validate the generation method and to functionally verify the RTL implementations. Consequently, the two architectures were build in Verilog and verified by digital simulations, achieving mean and standard deviation values as expected. Besides that, the proposals were synthesized using a 28nm and 45nm technology that ended presenting considerable LUT’s implementation superiority regarding timing, area and power. Nonetheless the results obtained, it was possible to recognize MCM’s structures application potential in system needing fixed multiplications with less complexity than the ones addressed in this project.