Análise por simulação de perdas em conversor estático PWM utilizando módulo FPGA.

Abstract

The present work has the purpose of the analysis of losses of power caused by switching and conduction in a static PWM converter through an FPGA module. The mode of implementation of the simulation will be studied by means of the description language of hardware verilog, as well as the peripheral serial communication used (SPI) with the DAC used. The loss by conduction depends on the current, in which the MOSFET is conducting, and its resistance. However, losses due to switching are difficult to estimate, due to the non-linearity present in the MOSFET parasitic capacitances, thus it is proposed in this work an alternative for the estimation of these losses. In order to prove the performance of the implemented implementation, the behavior of the switching and conduction loss powers, the measuring modules that would capture these switching and conduction moments, and the voltages and currents associated with the converter through simulations were analyzed with the help of software QUARTUS ©.