Estudo de viabilidade para implementação em hardware de técnica de aprendizado de máquina.

Abstract

The proliferation of the use of neural networks for classification issues, the availability of tools to describe and train such networks in cloud infrastrucutres and numerical computing softwares, results in a reduction of the work load related to the deployment of neural network solutions. Limitations in performance of processors and graphical units, in comparison to what FPGAs have to offer in its support to parallel computing and under demand design, has make these platforms as first choice in hardware acceleration for trained neural networks models. The several proficiencies required to fulfill a development flow comprising the training of a network and its description in hardware have their details studied in this undergraduate thesis.