Projeto de circuitos integrados assíncronos QDI em Tecnologia FD-SOI 28nm.

Abstract

The downscale of semiconductors’ feature size has led to increases in vulnerability of digital circuitry to process, voltage and temperature variations. To reduce these impacts, manufacturing technologies such as FD-SOI and the asynchronous design approach have been pointed as robust solutions to this problem. This internship proposes an asynchronous QDI IC design flow using the FD-SOI technology. The design of the layout of a synchronous simplified ARM7 microprocessor has been proposed as an initial task aiming to better understand the problem and the tools available to solve it. At the end, simulations and logical synthesis of asynchronous QDI double half buffer circuit and full adder were performed.