Scalable Web-Based FPGA Board simulator.

Abstract

Methods of learning HDLs (hardware description languages)mainly include practice with reprogrammable boards and simulators. The biggest obstacles to learning are the cost of these cards, the unfriendly interface of these simulators, and sometimes the tedious environment setup needed even to run a single line of code. This work presents a web-based FPGA (field-programmable gate array) board simulator. The system is composed of 2 main components: a front-end and a back-end, following a microservices architecture. It is possible to write code in SystemVerilog and interact with it using a virtual FPGA board, requiring only a browser and internet access. The steps involved between the user code input and the simulation are two code conversions. Since these conversions can run on a one-shot task, the system can be scaled horizontally. Thanks to server-sent events and a console emulator, the user can see everything happening on these tasks in real-time.