FELINTO, A. S.; FELINTO, ALAN S.; FELINTO, ALAN.; http://lattes.cnpq.br/0472663717988813; FELINTO, Alan Santana.
Résumé:
In this work, three topologies of three-phase multilevel cascaded converters were studied. In
the studied converters some cells have floating capacitors on their DC-links, that is, these
DC-links are not fed directly by any source and they do not fed any load. In the rectifiers
cases, two topologies are studied: a nine-leg rectifier, here named HY6L, and an open-end sixleg rectifier, here named 6LC. Besides, a nine-leg topology of series compensator (here named
9L-SC) is analysed. Converters model, control strategy and pulse-width modulation (PWM)
are presented, an also simulation and experimental results for validation purposes. Control
strategies for the voltages of floating capacitors are proposed for each topology, aiming to
guarantee the voltage regulation with minimum change in the level optimization of the output
voltage. Besides, scenarios that allow the converter to increase the maximum modulation
index are considered. These scenarios reduce the modulation index limitation that naturally
exists when floating capacitors are used. These scenarios consider grid voltage non-sinusoidal
or unbalanced for rectifiers. Besides, it is presented a voltage compensation technique that
allows increasing the maximum modulation index in series compensator topology. Studied
converters are compared with conventional topologies by means of total harmonic distortion
(THD), semiconductor losses and average switching frequency