ALVES, João Viniccius Gomes.; MELCHER, Elmar Uwe Kurt.; FECHINE, Joseana Macêdo.
Résumé:
The proposed work aims to achieve the hardware implementation of a detector to start / end
(endpoints) from utterance to be applied in the speaker verification of embedded systems. The
importance of this study is to determine, from time parameters of the voice, the beginning and
end of an utterance, excluding intervals of silence and noise present in it. Thus, it is possible to
decrease the amount of signal being processed and therefore the cost of memory and
processing time for extraction of features relevant to the process of speaker verification. For
implementation in hardware of the detector was used the programmable device (FPGA), using
the methodology of design of IP-Core called ipPROCESS.
