Projeto e simulação do Unified Power Format a partir de um IP-Core de baixo consumo.

Abstract

Over the years, the chips became smaller and thus, they started to have better performances, but not only that, they also started to have some problems. Energy expenditure has become problematic for several reasons, and it was therefore necessary to make chips more efficient. Energy management and efficiency could be improved within the design with the power intent format, this one provides methods for energy reduction. The present work will address the reasons that led to the need for techniques to reduce energy expenditure, how they became possible through the power intent format, and how this format is applied in the development flow.