Hardware verification is essential to ensure the quality of electronic circuits. In this context,
formal verification is capable of finding bugs that would be too hard to find in a
dynamic simulation, boosting verification quality. Based on properties, formal verification
attempts to prove that a design shows the intended behaviors and does not show
undesired behaviors. The RISC-V Formal Verification Framework is an open-source formal
verification tool, which enables the verification of processing cores based on RISC-V
architecture. We therefore proposed to apply this tool on the CV32E40P processor used
in the PULP platform, which is also open-source. With that, we were able to find bugs
in the design and understand why they happened.
ALMEIDA, M. A.; http://lattes.cnpq.br/9672713875399042; ALMEIDA, Matheus Andrade de.(BrasilCentro de Engenharia Elétrica e Informática - CEEIUFCGUniversidade Federal de Campina Grande, 2018-12-21)
The formal verification has great importance in the business world of technology, due to the
increase in the complexity of hardware and software systems which has led to a greater number
of fail found in the projects. ...
MENDES,J. S.; http://lattes.cnpq.br/2134269862420948; MENDES, José Samuel.(BrasilCentro de Engenharia Elétrica e Informática - CEEIUFCGUniversidade Federal de Campina Grande, 2018-12)
This work propose an interface of the major peripherals of a FPGA, like: switches,
keys, LEDs, seven segments displays. With the intention of applicate on the major
laboratory classes of digital circuits at UFCG. Looking ...
LEITE, N. M. N.; http://lattes.cnpq.br/4358099602140124; LEITE, Niago Moreira Nobre.(BrasilCentro de Engenharia Elétrica e Informática - CEEIUFCGUniversidade Federal de Campina Grande, 2019-07)
Convolution is a technique applied on mathematical signals in order to abstract new levels
of semantic comprehension about their characteristics. Such operation finds use in artificial
intelligence, the biomedical industry, ...
