Implementação de um barramento AX14 - LITE para circuitos integrados.

Abstract

The AX14-Lite protocol is a bus architecture developed by ARM Holdings designed to simplify efficient communication between a manager processor (such as an ARM processor) and subordinate devices in digital systems. This work provides an overview of the fundamental principles of AX14-Lite, its signals, operations and its applicability in different design contexts. A high-performance AX14-Lite bus was implemented using SystemVerilog. This entire project is divided into two parts: the first is the manager and subordinate design of AX14-Lite. The second part was a testbench to evaluate the manager and subordinate project components. This work serves as an accessible introduction to the AX14-Lite protocol, providing a solid foundation for future studies and practical implementations in digital systems projects. Making use of Cadence © tools.