REVOREDO, M. L. M.; REVOREDO, Maria Luceneide Mota. (BrasilCentro de Engenharia Elétrica e Informática - CEEIPÓS-GRADUAÇÃO EM ENGENHARIA ELÉTRICAUFCGUniversidade Federal de Campina Grande, 1978-12)
This project consists of the design and construction of an 8 - channel Logic Analyzer, with timing diagram out outford is play on a conventional laboratory o scilloscope. lt accepts either TTL or CMOS input, and has a ...