Relatório de estágio supervisionado no Laboratório de Excelência em Microeletrônica do Nordeste - XMEN.

Abstract

This report presents the activities carried out during the supervised internship at the Laboratory of Excellence in Microelectronics of the Northeast (XMEN), focusing on the study and application of the physical implementation flow of digital circuits. The work adopted the RISC-X processing core as a case study, an academic processor compatible with the RISC-V architecture and developed within the laboratory itself. Initially, the fundamentals of the integrated circuit design flow were analyzed, covering logical synthesis, equivalence checking between the RTL description and the synthesized netlist, and the stages of Physical Design, including floorplanning, power distribution, cell placement, clock tree synthesis, and routing. Scripts were also developed to automate stages of the flow, contributing to its reproducibility and organization. The synthesis results showed that increasing the operating frequency leads to growth in power consumption and occupied area, as well as a reduction in timing margin. In the physical implementation stage, the complete circuit layout was obtained and analyses of area, power, and timing were performed. The results indicated moderate power consumption, area occupation compatible with the size of the core, and the existence of a timing violation in the critical path for the 100 MHz operating frequency, indicating the need for further optimizations. Overall, the internship provided a practical understanding of the main stages involved in the physical development of digital integrated circuits, as well as the challenges associated with achieving a functional and optimized design for fabrication.